1. Field of the Invention
The present invention relates to a semiconductor device having a semi-insulating layer. The term "semi-insulating" is used to denote materials have resistivities in a range between the resistivities of semiconductor materials and the resistivities of insulating materials.
2. Summary of the Prior Art
JP-A-52-27032 discloses a semiconductor device in the form of a planar type diode. The diode disclosed has a first semiconductor region of a first conductivity type and a second region of a second conductivity type extending into the first region. Electrodes contact the first and second regions, with the first semiconductor region having a highly doped part, through which it contacts the electrode to improve the electrical connection therebetween.
In such a planar-type diode, a p-n junction is formed between the first and second semiconductor regions. When a reverse bias is applied to that p-n junction, a depletion region extends from the p-n junction and the spreading of that depletion region will affect the breakdown voltage of the diode. JP-A-52-27032 proposes that the electrodes be interconnected by a semi-insulating layer, with that semi-insulating layer being separated from the first semiconductor region by an insulating layer.
There have been many other proposals which seek to improve the breakdown voltage of planar-type semiconductor diodes, which do not make use of semi-insulating layers. It is known to provide one or more third semiconductor regions, of the same conductivity type as the second semiconductor region, which surround, but do not contact, that second semiconductor region. Electrodes may then be provided which contact the third semiconductor region. JP-A-59-141267 proposes that the third semiconductor regions have extensions extending radially inwardly and/or outwardly. JP-A-59-76466 suggests that there are plurality of such third semiconductor regions, and the electrodes associated therewith extend radially beyond the inward periphery of the third semiconductor region, over the first semiconductor region. To prevent direct contact between the third electrodes and the first semiconductor region, there is insulating material therebetween. Similarly, JP-A-57-155773 discloses that the third electrodes may extend radially outwardly, again covering part of the first semiconductor region with insulating material therebetween.
It should also be noted that JP-A-52-27032 discloses annular third semiconductor regions, without electrodes, below the semi-insulating layer, and JP-A-61-127184 discloses an arrangement similar to JP-A-52-27032 but in which the annular third semiconductor regions have different widths, and have different radial spacings therebetween.
Finally, U.S. patent application Ser. No. 4,691,223 discloses the use of a semi-insulating layer in a transistor structure, with the semi-insulating layer interconnecting the emitter and collector.